The present invention relates to semiconductor devices, and more particularly, a technique effectively applied to a semiconductor device for establishing electrical coupling between an electrode exposed to an upper surface of a semiconductor chip and a lead terminal by use of a metal plate.
Bonding systems in discrete products, such as a power metal-oxide semiconductor field-effect transistor (MOSFET) or insulated gate bipolar transistor (IGBT), have been recently proposed which are designed to couple an electrode pad on the upper surface of a semiconductor chip to the lead terminal by a metal plate comprised of copper, aluminum, or the like, instead of bonding wires, for the purpose of reduction in on-resistance or inductance.
For example, Japanese Unexamined Patent Publication No. 2005-243685 (Patent Document 1), and Japanese Unexamined Patent Publication No. 2007-266218 (Patent Document 2) disclose a semiconductor package including a metal plate containing copper and coupled to a source electrode pad of the semiconductor chip.
[Patent Document 1]
    Japanese Unexamined Patent Publication No. 2005-243685[Patent Document 2]    Japanese Unexamined Patent Publication No. 2007-266218